data_transfer_insts  920 ext/pcre/pcrelib/sljit/sljitNativeARM_32.c static sljit_sw data_transfer_insts[16] = {
data_transfer_insts  941 ext/pcre/pcrelib/sljit/sljitNativeARM_32.c 	(data_transfer_insts[(type) >> 4] | ((add) << 23) | ((wb) << 21) | (reg_map[target] << 12) | (reg_map[base1] << 16) | (base2))
data_transfer_insts  945 ext/pcre/pcrelib/sljit/sljitNativeARM_32.c 	(data_transfer_insts[(type) >> 4] & 0x04000000)
data_transfer_insts  671 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c static SLJIT_CONST sljit_ins data_transfer_insts[16 + 4] = {
data_transfer_insts  709 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c 		FAIL_IF(push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(arg & REG_MASK)
data_transfer_insts  773 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c 					return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(TMP_REG3) | TA(reg_ar), delay_slot);
data_transfer_insts  779 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c 						return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(TMP_REG3) | TA(reg_ar), delay_slot);
data_transfer_insts  782 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c 					return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | SA(tmp_ar) | TA(reg_ar), delay_slot);
data_transfer_insts  788 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c 					return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(base) | TA(reg_ar), delay_slot);
data_transfer_insts  808 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c 			return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | SA(tmp_ar) | TA(reg_ar), delay_slot);
data_transfer_insts  811 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c 		return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(base) | TA(reg_ar), delay_slot);
data_transfer_insts  819 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c 				FAIL_IF(push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(base) | TA(reg_ar) | IMM(argw), MOVABLE_INS));
data_transfer_insts  847 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c 		return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(base) | TA(reg_ar), delay_slot);
data_transfer_insts  855 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c 		return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(TMP_REG3) | TA(reg_ar), delay_slot);
data_transfer_insts  869 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c 		return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(TMP_REG3) | TA(reg_ar), delay_slot);
data_transfer_insts  874 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c 		return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(TMP_REG3) | TA(reg_ar), delay_slot);
data_transfer_insts  878 ext/pcre/pcrelib/sljit/sljitNativeMIPS_common.c 	return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | SA(tmp_ar) | TA(reg_ar), delay_slot);
data_transfer_insts  725 ext/pcre/pcrelib/sljit/sljitNativePPC_common.c static SLJIT_CONST sljit_ins data_transfer_insts[64 + 8] = {
data_transfer_insts  858 ext/pcre/pcrelib/sljit/sljitNativePPC_common.c 		inst = data_transfer_insts[(inp_flags | INDEXED) & MEM_MASK];
data_transfer_insts  868 ext/pcre/pcrelib/sljit/sljitNativePPC_common.c 	inst = data_transfer_insts[inp_flags & MEM_MASK];
data_transfer_insts  883 ext/pcre/pcrelib/sljit/sljitNativePPC_common.c 	inst = data_transfer_insts[inp_flags & MEM_MASK];
data_transfer_insts  978 ext/pcre/pcrelib/sljit/sljitNativePPC_common.c 		inst = data_transfer_insts[(inp_flags | INDEXED) & MEM_MASK];
data_transfer_insts  986 ext/pcre/pcrelib/sljit/sljitNativePPC_common.c 	inst = data_transfer_insts[inp_flags & MEM_MASK];
data_transfer_insts 1059 ext/pcre/pcrelib/sljit/sljitNativePPC_common.c 		inst = data_transfer_insts[(inp_flags | INDEXED) & MEM_MASK];
data_transfer_insts 1075 ext/pcre/pcrelib/sljit/sljitNativePPC_common.c 		inst = data_transfer_insts[(inp_flags | INDEXED) & MEM_MASK];
data_transfer_insts 1104 ext/pcre/pcrelib/sljit/sljitNativePPC_common.c 	inst = data_transfer_insts[(inp_flags | INDEXED) & MEM_MASK];
data_transfer_insts  481 ext/pcre/pcrelib/sljit/sljitNativeSPARC_common.c static SLJIT_CONST sljit_ins data_transfer_insts[16 + 4] = {
data_transfer_insts  519 ext/pcre/pcrelib/sljit/sljitNativeSPARC_common.c 			FAIL_IF(push_inst(compiler, data_transfer_insts[flags & MEM_MASK]
data_transfer_insts  609 ext/pcre/pcrelib/sljit/sljitNativeSPARC_common.c 		return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | dest | S1(arg2) | IMM(0), delay_slot);
data_transfer_insts  611 ext/pcre/pcrelib/sljit/sljitNativeSPARC_common.c 		return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | dest | S1(base) | S2(arg2), delay_slot);
data_transfer_insts  612 ext/pcre/pcrelib/sljit/sljitNativeSPARC_common.c 	FAIL_IF(push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | dest | S1(base) | S2(arg2), delay_slot));
data_transfer_insts  310 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c static SLJIT_CONST tilegx_mnemonic data_transfer_insts[16] = {
data_transfer_insts 1301 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 			FAIL_IF(PB2(data_transfer_insts[flags & MEM_MASK], reg_ar, ADDR_TMP_mapped));
data_transfer_insts 1303 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 			FAIL_IF(PB2(data_transfer_insts[flags & MEM_MASK], ADDR_TMP_mapped, reg_ar));
data_transfer_insts 1371 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 						return PB2(data_transfer_insts[flags & MEM_MASK], reg_ar, TMP_REG3_mapped);
data_transfer_insts 1373 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 						return PB2(data_transfer_insts[flags & MEM_MASK], TMP_REG3_mapped, reg_ar);
data_transfer_insts 1382 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 							return PB2(data_transfer_insts[flags & MEM_MASK], reg_ar, TMP_REG3_mapped);
data_transfer_insts 1384 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 							return PB2(data_transfer_insts[flags & MEM_MASK], TMP_REG3_mapped, reg_ar);
data_transfer_insts 1389 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 						return PB2(data_transfer_insts[flags & MEM_MASK], reg_ar, tmp_ar);
data_transfer_insts 1391 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 						return PB2(data_transfer_insts[flags & MEM_MASK], tmp_ar, reg_ar);
data_transfer_insts 1397 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 						return PB2(data_transfer_insts[flags & MEM_MASK], reg_ar, reg_map[base]);
data_transfer_insts 1399 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 						return PB2(data_transfer_insts[flags & MEM_MASK], reg_map[base], reg_ar);
data_transfer_insts 1420 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 				return PB2(data_transfer_insts[flags & MEM_MASK], reg_ar, tmp_ar);
data_transfer_insts 1422 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 				return PB2(data_transfer_insts[flags & MEM_MASK], tmp_ar, reg_ar);
data_transfer_insts 1428 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 			return PB2(data_transfer_insts[flags & MEM_MASK], reg_ar, reg_map[base]);
data_transfer_insts 1430 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 			return PB2(data_transfer_insts[flags & MEM_MASK], reg_map[base], reg_ar);
data_transfer_insts 1440 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 					FAIL_IF(PB2(data_transfer_insts[flags & MEM_MASK], reg_ar, ADDR_TMP_mapped));
data_transfer_insts 1442 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 					FAIL_IF(PB2(data_transfer_insts[flags & MEM_MASK], ADDR_TMP_mapped, reg_ar));
data_transfer_insts 1476 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 			return PB2(data_transfer_insts[flags & MEM_MASK], reg_ar, reg_map[base]);
data_transfer_insts 1478 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 			return PB2(data_transfer_insts[flags & MEM_MASK], reg_map[base], reg_ar);
data_transfer_insts 1490 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 			return PB2(data_transfer_insts[flags & MEM_MASK], reg_ar, TMP_REG3_mapped);
data_transfer_insts 1492 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 			return PB2(data_transfer_insts[flags & MEM_MASK], TMP_REG3_mapped, reg_ar);
data_transfer_insts 1509 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 			return PB2(data_transfer_insts[flags & MEM_MASK], reg_ar, TMP_REG3_mapped);
data_transfer_insts 1511 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 			return PB2(data_transfer_insts[flags & MEM_MASK], TMP_REG3_mapped, reg_ar);
data_transfer_insts 1520 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 			return PB2(data_transfer_insts[flags & MEM_MASK], reg_ar, TMP_REG3_mapped);
data_transfer_insts 1522 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 			return PB2(data_transfer_insts[flags & MEM_MASK], TMP_REG3_mapped, reg_ar);
data_transfer_insts 1528 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 		return PB2(data_transfer_insts[flags & MEM_MASK], reg_ar, tmp_ar);
data_transfer_insts 1530 ext/pcre/pcrelib/sljit/sljitNativeTILEGX_64.c 		return PB2(data_transfer_insts[flags & MEM_MASK], tmp_ar, reg_ar);