uimm              352 ext/pcre/pcrelib/sljit/sljitNativeARM_64.c 	sljit_uw mask, uimm;
uimm              365 ext/pcre/pcrelib/sljit/sljitNativeARM_64.c 	uimm = (sljit_uw)imm;
uimm              372 ext/pcre/pcrelib/sljit/sljitNativeARM_64.c 		if ((uimm & mask) != ((uimm >> len) & mask))
uimm              380 ext/pcre/pcrelib/sljit/sljitNativeARM_64.c 	if (uimm & 0x1) {
uimm              382 ext/pcre/pcrelib/sljit/sljitNativeARM_64.c 		uimm = ~uimm;
uimm              386 ext/pcre/pcrelib/sljit/sljitNativeARM_64.c 		uimm &= ((sljit_uw)1 << len) - 1;
uimm              389 ext/pcre/pcrelib/sljit/sljitNativeARM_64.c 	COUNT_TRAILING_ZERO(uimm, right);
uimm              392 ext/pcre/pcrelib/sljit/sljitNativeARM_64.c 	imm = (sljit_sw)~uimm;
uimm               35 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c 	sljit_uw uimm;
uimm               49 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c 	uimm = imm;
uimm               51 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c 		uimm = ~imm;
uimm               55 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c 	while (!(uimm & 0xff00000000000000l)) {
uimm               57 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c 		uimm <<= 8;
uimm               60 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c 	if (!(uimm & 0xf000000000000000l)) {
uimm               62 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c 		uimm <<= 4;
uimm               65 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c 	if (!(uimm & 0xc000000000000000l)) {
uimm               67 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c 		uimm <<= 2;
uimm               70 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c 	if ((sljit_sw)uimm < 0) {
uimm               71 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c 		uimm >>= 1;
uimm               74 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c 	SLJIT_ASSERT(((uimm & 0xc000000000000000l) == 0x4000000000000000l) && (shift > 0) && (shift <= 32));
uimm               77 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c 		uimm = ~uimm;
uimm               79 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c 	FAIL_IF(push_inst(compiler, LUI | TA(dst_ar) | IMM(uimm >> 48), dst_ar));
uimm               80 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c 	if (uimm & 0x0000ffff00000000l)
uimm               81 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c 		FAIL_IF(push_inst(compiler, ORI | SA(dst_ar) | TA(dst_ar) | IMM(uimm >> 32), dst_ar));
uimm               93 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c 	uimm <<= 32;
uimm               96 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c 	while (!(uimm & 0xf000000000000000l)) {
uimm               98 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c 		uimm <<= 4;
uimm              101 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c 	if (!(uimm & 0xc000000000000000l)) {
uimm              103 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c 		uimm <<= 2;
uimm              106 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c 	if (!(uimm & 0x8000000000000000l)) {
uimm              108 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c 		uimm <<= 1;
uimm              111 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c 	SLJIT_ASSERT((uimm & 0x8000000000000000l) && (shift2 > 0) && (shift2 <= 16));
uimm              114 ext/pcre/pcrelib/sljit/sljitNativeMIPS_64.c 	FAIL_IF(push_inst(compiler, ORI | SA(dst_ar) | TA(dst_ar) | IMM(uimm >> 48), dst_ar));